PKUnity A SoC Design and Verification Platform.ppt
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1、August 06,PKUnity: A SoC Design and Verification Platform,August 06,Outline,PKUnity SoC Platform Features Multi-Layers Verification Framework CDC Verification Tool Future Works,August 06,Outline,PKUnity SoC Platform Features Multi-Layers Verification Framework CDC Verification Tool Future Works,Augu
2、st 06,What for,Providing a PLATFORM for implementing and verifying NEW IDEALS in Nanotechnologies,Behavioral Level Simulation (SystemC),RTL Simulation/Emulation (Verilog/VHDL),FPGA Prototyping,Silicon Proving,New Ideas,Multi-Media Processing,CPU,On-chip communication,Network,Compiler,Softwares,PKUni
3、ty Platform,Synthesis,Low Power,August 06,What is,PKUnity Platform includes: a scalable and configurable SoC architecture a series of UniCore CPU plenty of communication IPs a verification framework some verification tools compilation tool chain and OS based on UniCore,August 06,PKUnity Architecture
4、,UniCore CPU,Memory and High Speed I/O,Low Speed I/O and System Modules,August 06,Design Features,August 06,Design Features,CPU 600MHz UniCore 8-Stage Pipeline 64-bit Floating Point Co-Processor 16KB I/D Cache 2-Port Bus Interface,Main Memory DDR (Double Data Rate) SDRAM 166MHz Clock and 64-bit Widt
5、h 2 Memory Access Channels,August 06,Design Features,High Speed I/O Devices 10M/100M/1G Ethernet MAC 66MHz PCI Bridge IDE SATA Controller USB OTG Controller,Low Speed I/O Devices UART I2C SPI AC97 PS/2,August 06,Design Flow,SystemC-based HW/SW Co-verification,RTL Simulation and Emulation,FPGA Protot
6、yping,Design and Implementation,RTL Sign Off,August 06,Challenges,Complex Communication Protocol Lots of Asynchronous Clock Domains,Design,Verification,&,Gap between CPU and Main Memory Different Bus Bandwidth Requirements Power Supply,August 06,Design Solutions,Two-Layer bus CPU-MEM bus IO-MEM bus,
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