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1、BRITISH STANDARD BS CECC 63000:1990 Harmonized system of quality assessment for electronic components: Generic specification: Film and hybrid integrated circuits Licensed Copy: London South Bank University, London South Bank University, Sat Dec 09 01:27:44 GMT+00:00 2006, Uncontrolled Copy, (c) BSI
2、BS CECC 63000:1990 This British Standard, having been prepared under the direction of the Electronic Components Standards Policy Committee, was published under the authority of the Board of BSI and comes into effect on 31 December 1990 BSI 09-1999 The following BSI references relate to the work on t
3、his standard: Committee reference ECL/24 Drafts for comment 85/30968 DC, 85/30991 DC, 87/23094 DC ISBN 0 580 18921 X Committees responsible for this British Standard The preparation of this British Standard was entrusted by the Electronic Components Standards Policy Committee (ECL/-) to Technical Co
4、mmittee ECL/24, upon which the following bodies were represented: British Broadcasting Corporation EEA the Electronics and Business Equipment Association Electronic Components Industry Federation GAMBICA BEAMA Ltd. Ministry of Defence National Supervising Inspectorate Society of British Aerospace Co
5、mpanies Ltd. The following bodies were also represented in the drafting of the standard, through subcommittees and panels: British Telecommunications plc Royal Signals and Radar Establishment Telecommunication Engineering and Manufacturing Association Amendments issued since publication Amd. No.Date
6、 of issueComments Licensed Copy: London South Bank University, London South Bank University, Sat Dec 09 01:27:44 GMT+00:00 2006, Uncontrolled Copy, (c) BSI BS CECC 63000:1990 BSI 09-1999i Contents Page Committees responsibleInside front cover National forewordiii Forewordii Section 1. Scope1 Section
7、 2. General 2.1Order of precedence2 2.2Related documents2 2.3Units, symbols and terminology3 2.4Standard and preferred values6 2.5Marking6 Section 3. Quality assessment procedures 3.1Primary stage of manufacture7 3.2Manufacturing stages and sub-contracting7 3.3Manufacturers approval7 3.4Approval of
8、Film and Hybrid Integrated Circuits (F semiconductor multi-chip integrated circuit; thin film integrated circuit; thick film integrated circuit; hybrid integrated circuit. A microcircuit consisting of various components and/or integrated micro-circuits which are constructed separately and which can
9、be tested before being assembled and packaged. NOTE 1For this definition, a component has external connections and possibly an envelope as well and it also can be specified and sold as a separate item. NOTE 2Further qualifying terms may be used to describe the form of the components and/or the assem
10、bly techniques used in the construction of a specific micro-assembly. Examples of the use of qualifying terms: semiconductor multi-chip micro-assembly; discrete component micro-assembly. An integrated circuit whose elements and interconnections are formed within and upon a semiconductor substrate. 2
11、.3.8 Multichip microcircuit Will be considered later. 2.3.9 Film integrated circuit An integrated circuit whose interconnections and elements (if any) are films formed on an insulating substrate surface. 2.3.10 Hybrid integrated circuit An integrated circuit formed by any combination of semiconducto
12、r and film integrated circuits or by the combination of any of these circuits with discrete elements. 2.3.11 Film hybrid integrated circuit A film integrated circuit on which at least one component, encapsulated or unencapsulated, has been mounted. 2.3.12 Passive film hybrid integrated circuit A fil
13、m hybrid integrated circuit in which all the elements are passive. 2.3.13 Active film hybrid integrated circuit A film hybrid integrated circuit in which at least one element is active. 2.3.14 Semiconductor chip hybrid integrated circuit A film hybrid integrated circuit containing one or more unenca
14、psulated semiconductor devices. 2.3.15 Substrate A piece of material forming a supporting base for film circuit elements and/or added components. 2.3.16 Multilayer film circuit A circuit of more than one layer of film interconnection, separated by at least one insulating film or gap. 2.3.17 Circuit
15、element An element, passive or active, of an integrated circuit that performs an electrical function. 2.3.18 Active element An element primarily contributing electrical rectification, switching or gain to a circuit function. NOTEActive elements may also be used to contribute resistance and capacitan
16、ce to a circuit function, or to convert externally applied energy from one form to another. Examples are diodes, transistors, semiconductor integrated circuits, light-sensing and light-emitting semiconductor devices. 2.3.6 Micro-assembly(IEC 147-0B) 2.3.7 Semiconductor integrated circuitIEC 50(521-1
17、0-06) Licensed Copy: London South Bank University, London South Bank University, Sat Dec 09 01:27:44 GMT+00:00 2006, Uncontrolled Copy, (c) BSI BS CECC 63000:1990 BSI 09-19995 2.3.19 Passive element An element primarily contributing resistance, capacitance or inductance or a combination of these to
18、a circuit function. NOTEExamples are resistors, capacitors, inductors, filters, interconnecting tracks. A film integrated circuit whose films are formed by vacuum deposition techniques, possibly supplemented by other deposition techniques. A film integrated circuit whose films are formed by printing
19、, serigraphy or other related techniques. 2.3.22 Vapour phase deposition technique The deposition of conducting, insulating or semiconducting films onto solid substrates from a source material in the vapour phase by physical deposition or chemical reaction. 2.3.23 Screen printing technique The depos
20、ition of conducting, insulating or semiconducting films onto solid substrates by pressing pastes (inks) through screens. 2.3.24 Plated film Film obtained through chemical and/or electrochemical deposition. 2.3.25 Termination (Terminal) Conductor (pin, tab, pad, etc .) providing external electrical a
21、ccess to the integrated circuit. 2.3.26 Package Total or partial envelope of an integrated circuit which provides: mechanical protection environmental protection outline dimensions. The package may also contain or provide terminations. It contributes to the thermal characteristics of the integrated
22、circuit. 2.3.27 Encapsulation Encapsulation is the general process of surrounding the circuit or components with a protection medium against mechanical and physical/chemical stresses. 2.3.28 Protective coating A layer of insulating material applied over the circuit elements for the purpose of mechan
23、ical protection and prevention of contamination. 2.3.29 Embedding A process using resins which can be hardened to produce a body embedding the electronic assembly for example: casting potting dip-coating transfer moulding. 2.3.30 Process test vehicle A specimen, not necessarily of a circuit but repr
24、esentative of at least one operation in the production line for the circuit to be qualified, and on which tests can be carried out to validate control of one or more processes. 2.3.31 Capability qualifying circuit (CQC) A test specimen used to assess, in part or in whole, a declared capability. It m
25、ay be either a specially designed test specimen or a normal production circuit, or a combination of both. 2.3.20 Thin-film integrated circuitIEC 50 (521-10-08) 2.3.21 Thick-film integrated circuitIEC 50 (521-10-09) Licensed Copy: London South Bank University, London South Bank University, Sat Dec 09
26、 01:27:44 GMT+00:00 2006, Uncontrolled Copy, (c) BSI BS CECC 63000:1990 6 BSI 09-1999 2.3.32 Part-completed component or F for example, the length of time that the device shall be maintained at test conditions before making a measurement. 4.4.3 Temperature The ambient temperature shall be measured a
27、s the air temperature adjoining the film and hybrid integrated circuit in an environment of substantially uniform temperature, cooled only by natural air convection and not materially affected by reflective and radiant surfaces. 4.4.4 Precautions The precautions should include limits on maximum inst
28、antaneous currents and applied voltages. It is recommended that devices should not be inserted into, or removed from, a test circuit while the latter is energized. For MOS-devices, adequate precautions should be taken to prevent damage from static charges both before and after test. 4.4.5 Measuremen
29、t circuit requirements and accuracy 1) Constant current source A current shall be considered constant if a two-to-one increase of the effective load impedance does not produce a change in the parameter being measured that is greater than the required accuracy of the measurement. 2) Current measuring
30、 device The effective admittance of a current measuring device shall be sufficiently high so that halving its value does not significantly affect the accuracy of the measurement. 3) Constant voltage source A voltage shall be considered constant if a two-to-one decrease of the effective load impedanc
31、e does not produce a change in the parameter being measured that is greater than the required accuracy of measurement. 4) Voltage measuring device The effective impedance of a voltage measuring device shall be sufficiently high so that halving its value does not significantly affect the accuracy of
32、measurement. 5) Load impedance The load impedance represents the equivalent input impedance of the test circuit and the device under test. For acceptance test purposes, the input impedance may be replaced by a resistor representing worstcase conditions. 6) Power supplies The sources of direct curren
33、ts and voltages shall not have a ripple content large enough to affect the desired accuracy of measurement. Test or supply voltages or currents shall be within 1 % of the specified value. Licensed Copy: London South Bank University, London South Bank University, Sat Dec 09 01:27:44 GMT+00:00 2006, U
34、ncontrolled Copy, (c) BSI BS CECC 63000:1990 16 BSI 09-1999 7) Accuracy of measurements Unless otherwise specified, the accuracy of the measuring equipment shall be such that the error does not exceed: for absolute measurements, 10 % of the rated tolerance for relative measurements, 10 % of the spec
35、ified maximum change. 4.4.6 Circuits with functionnally independent sections Each functionnally independent section of a multiple integrated circuit shall be tested individually and all terminals associated solely with sections not under test shall be left unconnected or as specified. Multiple integ
36、rated circuits shall be checked to ensure that interaction is not present between functionnally independent sections. Each of a group of functionnally equivalent signal terminals shall be tested individually, with connections as specified in the detail specification applied to the remainder. 4.4.7 U
37、nspecified connections to terminals Any terminal for which no conditions are specified shall be left unconnected. 4.4.8 Electrical measuring methods Measurements may be carried out by using the methods as prescribed in the sectional specification or any other method, giving compatible results, but i
38、n case of conflict, the specified method shall be used. NOTEBy “compatible” is meant that the value of the characteristic established by such other method will fall within the specified limits when measured by the specified method. (See also CECC 00111). 4.4.9 Insulation resistance Unless otherwise
39、prescribed in the detail specification a dc voltage of 100 15 V, shall be applied for 1 min 5 s. Where necessary, the polarity shall be specified in the detail specification. 1) Insulation between terminals (or groups of terminals) The voltage shall be supplied between any and every combination of t
40、erminals which are electrically and functionally isolated. 2) Insulation between all the isolated terminals and the case The voltage shall be applied between a metal foil tightly held in contact with the case and all the terminals of the circuit connected together (except those leads which are elect
41、rically connected to the case). The size and positioning of the foil shall not reduce the insulation paths. 3) Unless otherwise specified in the detail specification, a F&HIC fails the test if there is: a) evidence of flashover or mechanical damage b) any individual reading of insulation resistance
42、less than 100 M 7. 4.4.10 Measurement of separately accessible elements 1) Deposited film elements Deposited resistors Resistance value shall be measured with an absolute overall measurement system accuracy of at least ten times better than the initial tolerance when the initial tolerance is 0,5 % o
43、r greater. An absolute overall measurement system accuracy of at least five times better than the initial tolerance shall be required when the initial tolerance is less than 0,5 %. Maximum power dissipation per resistor shall be 10 % of the rated power or 0,01 watt per resistor, whichever is less. O
44、ther deposited elements The measurement of all deposited elements shall be achieved in accordance with CECC or IEC specifications unless otherwise specified in the detail specification. 2) Added components As 4.4.10 1). 4.4.11 Measurement of the electrical characteristics of the circuit Wherever pos
45、sible the tests shall be drawn from existing CECC or IEC documents. Licensed Copy: London South Bank University, London South Bank University, Sat Dec 09 01:27:44 GMT+00:00 2006, Uncontrolled Copy, (c) BSI BS CECC 63000:1990 BSI 09-199917 4.5 Environmental testing procedures The following tests are
46、indicated “destructive” (D) or “non-destructive” (ND) according to their effect on the device. Devices subjected to tests indicated (D) shall not be included in the lot for delivery unless otherwise specified in the detail specification. Devices subjected to tests indicated (ND) may be delivered pro
47、vided they are re-tested to groups A and B requirements and satisfy them. 4.5.1 Storage at high temperature (non destructive) When it is agreed that this test degrades solderability or other characteristics, the detail specification may either designate it as destructive or require it to be carried
48、out in an inert atmosphere. Initial measurements: as applicable. This test corresponds with Test Ba of IEC 68-2-2 (1974) with the following details: No special pre-conditioning procedure. The air in the chamber need not be agitated and there shall be no requirement for relative humidity during the c
49、onditioning period. Temperature: maximum storage temperature. Duration of the conditioning after thermal equilibrium: There shall be no loading or measurements performed during conditioning. After the test the F&HICs shall be allowed to recover for max. 24 h see 4.2.1 4). The detail specification shall prescribe: temperature of conditioning duration of conditioning final measurements. 4.5.2 Cold (non destructive) This test is in accordance with Test Ab of IEC 68-2-1 (1974) with the following details: Initial measurements: as applicable. Temper
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