EIA-364-108-2000-R2007.pdf
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1、 EIA STANDARD TP-108 Impedance, Reflection Coefficient, Return Loss, and VSWR Measured in the Time and Frequency Domain Test Procedure for Electrical Connectors, Cable Assemblies or Interconnection EIA-364-108 ANSI/EIA-364-108-2000(R2007) Approved: July 7, 2000 Reaffirmed: March 1, 2007 Systems EIA-
2、364-108 JULY 2000 ELECTRONIC COMPONENTS, ASSEMBLIES 2 curves (different rise times) and start and stop specimen points A-2 A.3Example of analyzer output, impedance vs. log frequency plot .A-3 C.1Typical mother board test fixture .C-2 C.2Typical daughter board test fixture .C-2 C.3Example of near end
3、 reference trace C-5 D.1Example of an impedance profile of connector using a measurement system rise time of 35 ps D-1 D.2Example of impedance profiles of cable under the rise time of 35 ps and 1 ns .D-2 E.1Single-ended terminations E-1 E.2Differential (balanced) terminations E-2 G.1Microstrip (a) a
4、nd stripline (b) geometries .G-1 G.2Buried microstrip geometry G-2 Copyright Electronic Components, Assemblies e.g., normalization or filtering. Copyright Electronic Components, Assemblies see annex E. Copyright Electronic Components, Assemblies see annex B. The calibration plane should be as close
5、to the specimen as possible. When the fixture includes a pc board with line traces connecting two connectors, it shall have a reference trace(s) that will allow the measurement system rise time to be measured. The reference trace shall have starting points and endpoints at the same location as the D
6、UT starting point and end point. This is because the reference trace(s) length shall be the same as the pc board traces. 2.2.3.2 Frequency domain It is necessary to include fixture features that will allow for the open, short, and load measurements to be taken. This may be accomplished by one of two
7、 methods. Firstly, provide reference traces that include the open, load and short standards. Secondly, provide an interface where these standards can be applied directly to the end of the fixture and immediately before the input plane of the device under test. When using the open/short method, the f
8、ixture shall include features such that measurements may be conducted with the far end of the driven line both open- circuited and short-circuited. NOTE Other calibration techniques (such as Through-Reflect-Line) may be used. The fixture shall incorporate features appropriate to that calibration met
9、hod(s). 2.2.4 Single-ended The fixture shall allow one signal line to be driven at a time. The far end of the driven line shall be terminated in the specimen environment impedance (typically 50 ohms). It is recommended that a length of transmission line be added after the sample that has a propagati
10、on delay greater than twice the measurement system rise time. Unless otherwise specified in the referencing document: Copyright Electronic Components, Assemblies see 2.2.3.1 for more detailed information. Copyright Electronic Components, Assemblies e. g., s11. 4.2.1.2 Fixture measurement Set the ana
11、lyzer for a single port (or comparable) measurement. Select the display mode for the desired parameter (impedance, reflection coefficient, return loss, VSWR) as specified in the referencing document. If using a network analyzer, measure and record s11. Refer to figure A.3 for an example of a network
12、 analyzer plot. It is recommended that the following equipment settings be used: cartesian plots with a logarithmic frequency scale and linear Y-axis, minimum of 201 measurement points, maximum smoothing of 1%. If the equipment does not have the capability to display the requested parameter directly
13、 see the applicable clause of 1.3 for conversion equations. 4.2.2 Specimen measurement - Direct method 4.2.2.1 Connect the analyzer line(s) to the driven line(s) of the fixture with the specimen installed. Terminate the far end of the test specimen in the specimen environment impedance. Copyright El
14、ectronic Components, Assemblies e.g., TDR traces, parameter vs. frequency graphs, or Smith charts. 5.8 Minimum, maximum, or average values of the time domain parameter(s) measured or calculated for the specimen. NOTE When average values are requested, the minimum and maximum values shall also be rep
15、orted. 5.9 Minimum, maximum, or average values of the frequency domain parameter(s) measured or calculated for the specimen over a desired frequency range or at specific frequencies. NOTE When average values are requested, the minimum and maximum values shall also be reported. Copyright Electronic C
16、omponents, Assemblies 2 curves (different rise times) and start and stop specimen points Copyright Electronic Components, Assemblies if the conductor is covered by solder mask or other material (as is typical), the higher dielectric constant of that material will lower the impedance from the value c
17、alculated using the equation. G.2.3 The stripline structure shown in figure G.1(b) is one in which the signal line is surrounded by the dielectric material, with ground or reference planes on two sides. The characteristic impedance for the stripline structure is given by the following equation. 2) +
18、 = w t w b Z r 8 . 067 . 0 4 ln 60 0 G.2.4 A similar structure also exists where the conductor in question is inside the surface of the printed circuit board but is only adjacent to a ground or reference plane in one direction. This is referred to variously as “buried” microstrip or “covered” micros
19、trip, and is shown in figure G.2. Figure G.2 - Buried microstrip geometry 1) Blood, William R., Jr.: MECL System Design Handbook (Phoenix, AZ: Motorola Semiconductor Products, Inc., 1988), p. 45. 2) Op. cit., p. 48. bt w h Ground Dielectric Copyright Electronic Components, Assemblies the use of fiel
20、d solver software is often necessary to solve this type of problem. The use of vias is to be discouraged where possible, as the capacitance of vias causes impedance mismatches and consequent reflections in the signal path. In the event that surface ground planes are used to construct stripline struc
21、tures, the surface and buried Ground planes should be connected together by vias spaced no more than /8 apart, to prevent resonances and other undesired effects on the printed circuit board. G.2.6 Attenuation of high frequency signals (or higher order harmonics of non-sinusoidal signals) due to the
22、so-called skin effect is a well-known phenomenon. Skin effect becomes significant when the skin depth is less than approximately one third of the conductor thickness. 4) The skin depth in meters at a given frequency of interest is given by d = 0.0660/f 5), or approximately 2.1 mm at 1 GHz. Assuming
23、0.0014” thick (1.4 mils or 0.036 mm, commonly referred to as “one ounce” copper) conductors typically used for printed circuit board trace, this would indicate that skin effect would be significant at frequencies above approximately 85 MHz. G.2.7 Another effect that should be considered is resonance
24、. Resonance can cause unexpected results, and even oscillations in the device/fixture. This effect is not just manifested at the frequencies of the exciting signals, but also at harmonics of those frequencies present in the exciting signal; the spectral content of square or nearly square pulses can
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