BS-CECC-90112-1987.pdf

BRITISH STANDARD BS CECC 90112:1987 Incorporating Amendment No. 1 Specification for Harmonized system of quality assessment for electronic components Blank detail specification MOS read/write dynamic memories silicon monolithic circuits Licensed Copy: London South Bank University, London South Bank University, Sat Dec 09 01:27:30 GMT+00:00 2006, Uncontrolled Copy, (c) BSI BS CECC 90112:1987 © BSI 04-2000 ISBN 0 580 35840 2 Amendments issued since publication Amd. No.Date of issueComments 8165March 1994Indicated by a sideline in the margin Licensed Copy: London South Bank University, London South Bank University, Sat Dec 09 01:27:30 GMT+00:00 2006, Uncontrolled Copy, (c) BSI BS CECC 90112:1987 © BSI 04-2000i Contents Page National forewordii Forewordii Scope1 Related documents1 Structure of Detail Specifications1 Units, symbols and terminology1 Application of Quality Assessment Procedures1 1Type description2 2Operating Characteristics3 3Identification of the device types10 4Test and measurement procedures10 5Structural similarity of memories11 6Qualification approval procedures11 7Capability approval procedures11 8Screening procedures11 9Inspection requirements12 Licensed Copy: London South Bank University, London South Bank University, Sat Dec 09 01:27:30 GMT+00:00 2006, Uncontrolled Copy, (c) BSI BS CECC 90112:1987 ii © BSI 04-2000 National foreword The British Standard has been prepared under the direction of the Electronic Components Standards Committee. It is identical with CENELEC Electronic Components Committee (CECC) 90112:1986 “Harmonized system of quality assessment for electronic components. Blank detail specification: MOS read/write dynamic memories silicon monolithic circuits”. This standard is a harmonized specification within the CECC System. Terminology and conventions. The text of the CECC specification has been approved as suitable for publication as a British Standard without deviation. Some terminology and certain conventions are not identical with those used in British Standards; attention is drawn especially to the following. The comma has been used as a decimal marker. In British Standards it is current practice is use a full point on the baseline as the decimal marker. Cross-references. The British Standard which implements CECC 00100 is BS 9000: “General requirements for a system for electronic components of assessed quality” Part 2:1983 “Specification for national implementation of CECC basic rules and rules of procedure”. The Technical Committee has reviewed the provisions of IEC 747, to which reference is made in the text, and has decided that they are acceptable for use in conjunction with this standard. Scope. This standard lists the ratings, characteristics and inspection requirements which shall be included as mandatory requirements in accordance with BS CECC 90100 in any detail specification for these devices. Detail specification layout. The front page layout of detail specifications released to BS CECC family or blank detail specifications will be in accordance with BS 9000 Circular letter No. 15. A British Standard does not purport to include all the necessary provisions of a contract. Users of British Standards are responsible for their correct application. Compliance with a British Standard does not of itself confer immunity from legal obligations. International StandardsaCorresponding British Standards IEC 68-2-30BS 2011: Basic environmental testing procedures Part 2.1 Db:1981 Test Db and guidance. Damp heat cyclic (12 + 12 hour cycle) (Identical) IEC 617-12BS 3939 Guide for graphical symbols for electrical power, telecommunications and electronics diagrams: Part 12:1985 Binary logic elements (Identical) CECC 90000:1985BS CECC 90000:1985 Harmonized system of quality assessment for electronic components. Generic specification: monolithic integrated circuits (Identical) CECC 90100:1986BS CECC 90100:1986 Harmonized system of quality assessment for electronic components. Sectional specification: digital monolithic integrated circuits (Identical) a Undated in text. Summary of pages This document comprises a front cover, an inside front cover, pages i and ii, the CECC title page, page ii, pages 1 to 13 and a back cover. This standard has been updated (see copyright date) and may have had amendments incorporated. This will be indicated in the amendment table on the inside front cover. Licensed Copy: London South Bank University, London South Bank University, Sat Dec 09 01:27:30 GMT+00:00 2006, Uncontrolled Copy, (c) BSI Licensed Copy: London South Bank University, London South Bank University, Sat Dec 09 01:27:30 GMT+00:00 2006, Uncontrolled Copy, (c) BSI BS CECC 90112:1987 ii © BSI 04-2000 Foreword The CENELEC Electronic Components Committee (CECC) is composed of those member countries of the European Committee for Electrotechnical Standardization (CENELEC) who wish to take part in a harmonized System for electronic components of assessed quality. The object of the System is to facilitate international trade by the harmonization of the specifications and quality assessment procedures for electronic components, and by the grant of an internationally recognized Mark, or Certificate, of Conformity. The components produced under the System are thereby accepted by all member countries without further testing. This specification has been formally approved by the CECC, and has been prepared for those countries taking part in the System who wish to issue national harmonized specifications for MOS READ/WRITE DYNAMIC MEMORIES SILICON MONOLITHIC CIRCUITS. It should be read in conjunction with the current regulations for the CECC System. At the date of printing of this specification the member countries of the CECC are Austria, Belgium, Denmark, Finland, France, Germany, Ireland, Italy, the Netherlands, Norway, Portugal, Spain, Sweden, Switzerland, and the United Kingdom. Preface This blank detail specification (BDS) was prepared by CECC WG9 “Integrated circuits”. It is based, wherever possible, on the Publications of the International Electrotechnical Commission and in particular on IEC 747: Semiconductor devices Discrete devices and integrated circuits. The text of this BDS was circulated to the CECC for voting in the documents indicated below and was ratified by the President of the CECC for printing as a CECC specification. It is recognized that the layout proposed cannot be applied to all detail specifications based on this document. For instance, it may be preferable to indicate the limiting values in the form of a table when several similar devices appear in the same detail specification. In accordance with the decision of the CECC Management Committee this specification is published initially in English and French. The German text will follow as soon as it has been prepared. DocumentsDate of VotingReport on the Voting CECC (Secretariat) 1338March 1983CECC (Secretariat) 1493 CECC (Secretariat) 1605August 1984CECC (Secretariat) 1724 Licensed Copy: London South Bank University, London South Bank University, Sat Dec 09 01:27:30 GMT+00:00 2006, Uncontrolled Copy, (c) BSI BS CECC 90112:1987 © BSI 04-20001 General The following information is given for guidance Scope This BDS relates to MOS Read/Write Dynamic Memories in accordance with IEC 747: Semiconductor devices Discrete devices and integrated circuits. Related documents See 2.1 of CECC 90100 and 2.2 of CECC 90000 Structure of Detail Specifications Clause numbering of DS shall be in accordance with that of this document. Units, symbols and terminology See 2.3 of CECC 90100 and 2.3 of CECC 90000 Application of Quality Assessment Procedures See 3 of CECC 90100 and CECC 90000. Licensed Copy: London South Bank University, London South Bank University, Sat Dec 09 01:27:30 GMT+00:00 2006, Uncontrolled Copy, (c) BSI BS CECC 90112:1987 2 © BSI 04-2000 Layout for front page of detail specification Licensed Copy: London South Bank University, London South Bank University, Sat Dec 09 01:27:30 GMT+00:00 2006, Uncontrolled Copy, (c) BSI BS CECC 90112:1987 © BSI 04-20003 The front page of the DS shall be laid out as shown on the previous page. The numbers between square brackets correspond to the following indications which shall be given: Identification of the DS and of the component: Identification of the component and supplementary information: Description of the materials for the package (for example, glass, ceramic, metal, plastic) and information relating to the mounting (welding, soldering), lead material and finish. Inside the sketch of the package, the terminal connections to the inputs, outputs or other important points of the circuit shall be identified. This can be shown by a functional block diagram. Description of the numbering of the terminals with the identification of pin number 1. Marking on the device in accordance with the GS (see 2.5 of CECC 90000). 2 Operating characteristics The following characteristics shall apply over the full operating temperature range and the supply voltage range unless otherwise specified. 2.1 General description The following characteristics shall be given if they are not adequately defined in clause 1: Nominal voltage supply level. The type of refresh modes. Operating modes (for example address sampling). Electrical compatibility (if appropriate): it shall be stated whether the integrated circuit memory is electrically compatible with other particular integrated circuits or families of integrated circuits, or whether special interfaces are required. 1 The name of the National Standards Organization under whose authority the DS is published and, if applicable, the organization from whom the DS is available. 2 The CECC Symbol and the CECC number allotted to the DS by the CECC General Secretariat. 3 The number and issue number of the CECC generic or sectional specification as relevant; also national reference if different. 4 If different from the CECC number, the national number of the DS, date of issue and any further information required by the national system, together with any amendment numbers. 5 Type number, a short description of the type by: function performance, for example variants based on speed, temperature, power etc. 6 Information on typical construction material and type of construction (silicon, monolithic, bipolar, MOS) For 5 and 6 the text to be given in the DS should be suitable for an entry in CECC 00200 (QPL) and CECC 00300 (Library List). 7 An outline drawing with main dimensions which are of importance for interchangeability, and/or reference to the appropriate national or international document for outlines. Alternatively, this drawing may be given in an annex to the DS. 8 Quality assessment level(s) 9 Reference data giving information on the most important properties of the component, which allow comparison between the various component types intended for the same, or for similar, applications. The DS shall give a brief description including the following: Technology (N MOS, H MOS . . .) Structure (words × bits) The type of output circuit (for example: open collector, three state . . .) Essential functions Licensed Copy: London South Bank University, London South Bank University, Sat Dec 09 01:27:30 GMT+00:00 2006, Uncontrolled Copy, (c) BSI BS CECC 90112:1987 4 © BSI 04-2000 Block diagram: the block diagram shall be sufficiently detailed to enable the individual functional units within the memory to be identified with their main input and output paths and the identification of their external connections (chip enable, address decode . . .). The function(s) performed by each terminal. The IEC 617-12 symbolic representation shall be given if it exists. 2.2 Detailed Functional Specification This paragraph defines the following characteristics memory size: the total number of bits of information capable of being stored in the memory circuit memory organisation: the number of bits per word capable of being stored in the memory circuit addressing mode (row address select and column address if address multiplexing) chip select1) output enable1) standby mode truth table (this table will show the output states versus the different combinations between the address inputs and the select inputs) 2.3 Limiting conditions of use (ratings) Limiting conditions (ratings) are not for inspection purposes. Values of limiting conditions of use shall be given as follows: Any cautionary statement unique to an individual integrated circuit shall be included, for example the handling of MOS circuits. Any interdependence of limiting conditions shall be specified. If externally connected elements have an influence on the values of the ratings, the ratings shall be prescribed for the integrated circuit with the elements connected for example heatsinks. If transient overloads are permitted, their magnitude and durations shall be specified. All voltages are referenced to a reference terminal (Vss, GND, etc.). 2.4 Recommended conditions of use and associated characteristics (In accordance with 5.3.8 of CECC 90100) Not for inspection purpose. The characteristics shall apply over the full operating temperature range, unless otherwise specified. Where the stated performance of the circuit varies over the operating temperature range, the values of the input and output voltages and their associated currents shall be stated at 25 °C and at the extremes of the operating temperature range. Values of current and voltage shall be given for each functionally different type of input and/or output. 1) The chip select and the output enable shall be distinguished. CharacteristicsSymbolmin.max.Unit Supply voltageVDD, VBB, VCC, VEE,V Input voltagesVIV Output voltagesVOV Off-state voltage (Note 1)VOZV Output currentsIOmA Input currentsIImA Max. power-dissipationPD max.n.a.W Operating temperatureTamb and/or Tcase°C Storage temperatureTstg°C NOTE 1Where appropriate. Licensed Copy: London South Bank University, London South Bank University, Sat Dec 09 01:27:30 GMT+00:00 2006, Uncontrolled Copy, (c) BSI BS CECC 90112:1987 © BSI 04-20005 Special characteristics and timing requirements shall be specified by the relevant DS. 2.4.1 Recommended conditions of use All voltages are referenced to a reference terminal (VSS, GND, etc.). 2.4.2 Associated characteristics (if applicable) 2.5 Static characteristics All voltages are referenced to a reference terminal (VSS, GND etc.) CharacteristicsConditionsSymbolsmin.max.Unit Supply voltageVCC (Note 1) VDD (Note 1) VBB (Note 1) VEE (Note 1) V V V V Low level input voltageVILV High level input voltageVIHV Operating temperatureTamb and/or Tcase°C NOTE 1Where appropriate these values should also be quoted under standby conditions. Characteristics Conditions (Notes 4, 5) Symbolsmin.amax.aUnit Average operating current during R/W cycle (Note 1) VCC max.ICC IDD IBB IEE Where appropriate mA mA mA mA Standby current (Note 1) Aver