MP3、MP4维修资料：PL-2539车载硬盘MP3.pdf

PL-2539 Portable Multimedia Data Bank with USB Lite Host Product Datasheet Document Revision: 0.9A Document Release: October, 2004 Prolific Technology Inc. 7F, No. 48, Sec. 3, Nan Kang Rd. Nan Kang, Taipei 115, Taiwan, R.O.C. Tel: 886-2-2654-6363 / Fax: 886-2-2654-6161 Email: salesprolific.com.tw URL: http:/www.prolific.com.tw Tech: http:/tech.prolific.com.tw Release Date: October 2004 ds_pl2539_v09A Disclaimer All the information in this document is subject to change without prior notice. Prolific Technology Inc. does not make any representations or any warranties (implied or otherwise) regarding the accuracy and completeness of this document and shall in no event be liable for any loss of profit or any other commercial damage, including but not limited to special, incidental, consequential, or other damages. Trademarks The Prolific logo is a registered trademark of Prolific Technology Inc. All brand names and product names used in this document are trademarks or registered trademarks of their respective holders. Copyrights Copyright © 2004 Prolific Technology Inc. All rights reserved. No part of this document may be reproduced or transmitted in any form by any means without the express written permission of Prolific Technology Inc. PL-2539 Product Datasheet - 2 - Document Version 0.9A Release Date: October 2004 ds_pl2539_v09A Revision History Revision Description Date 0.9A ? Preliminary Draft Datasheet October 6, 2004 PL-2539 Product Datasheet - 3 - Document Version 0.9A Release Date: October 2004 ds_pl2539_v09A Table of Contents 1.0 FEATURES.6 2.0 BLOCK DIAGRAM.7 3.0 OVERVIEW.7 4.0 PIN ASSIGNMENT AND DESCRIPTION .8 5.0 DC CHARACTERISTICS16 5.1 Absolute Maximum Ratings 16 5.2 Recommended Operation Conditions. 16 5.3 General DC Characteristics. 16 5.4 DC Electrical Characteristics for 3.3 V Operation . 17 6.0 ORDERING INFORMATION.17 7.0 OUTLINE DIAGRAM 18 7.1 PL-2539 LQFP216pin (?mm x ?mm) Outline Diagram: 18 PL-2539 Product Datasheet - 4 - Document Version 0.9A Release Date: October 2004 ds_pl2539_v09A List of Figures Figure 1-1 Block Diagram of PL-2539.7 Figure 4-1 Pin Assignment of PL-2539 LQFP216.8 Figure 7-1 Outline Diagram of PL-2539 LQFP21618 List of Tables Table 4-1 Pin Descriptions of PL-2539 LQFP216.9 Table 5.1 Absolute Maximum Ratings.16 Table 5.2 Recommended Operation Conditions.16 Table 5.3 General DC Characteristics.16 Table 5.4 DC Electrical Characteristics for 3.3V Operation17 Table 6.1 Ordering Information .17 PL-2539 Product Datasheet - 5 - Document Version 0.9A Release Date: October 2004 ds_pl2539_v09A 1.0 Features ? Full compliance with Universal Serial Bus Specification v2.0 ? On chip USB 2.0 PHY ? On chip 3.3V-2.5V 150mA regulator for internal circuit ? Supports Prolific Lite Host to access external USB devices ? Embedded MP3 decoder and ADPCM voice record engine ? Embedded I2S engine to interface with external audio codec ? Supports Ultra ATA/66 interface ? Supports Secure Digital (SD)/Multi Media Card (MMC) interfaces ? Supports Memory Stick (MS)/Memory Stick PRO (MS PRO) interfaces ? Supports Compact Flash (CF)/Micro Drive (MD) interfaces ? Supports Smart Media (SM)/xD-Picture (xD) interfaces ? Supports up to four NAND flash memories with high performance o The write throughput is up to 8M/15M byte/s and the read throughput is over 11M/20M byte/s in single/dual mode, respectively ? Supports firmware upgrade (in circuit programming, ICP) via USB ? Supports LCD and SRAM interface on CPU bus ? Built-in real time clock (RTC) function ? Built-in Data SRAM/SDRAM interface to boost the throughput ? Provides a dedicated serial port with baud-rate reaching 921600 ? Advanced power management mechanism ? Package type: LQFP 216 pin PL-2539 Product Datasheet - 6 - Document Version 0.9A Release Date: October 2004 ds_pl2539_v09A 2.0 Block Diagram 3.3V Power 2.5V Output USB2.0 host or USB1.1 device 12M Hz Crystal Audio CODEC USB 1.1 Lite Host Controller Power Mgnr PLL USB Protocol Processor MP3 decoder Voice Recorder Flash Controller LCD 32768 Hz Crystal RTC SRAM/ SDRAM USB 2.0 Device Controller USB 2.0 PHY USB 1.1 TXRD 3.3-2.5 Regulator NAND Flash Card Reader Controller CF/MD MS/MS PRO SM/xD SD/MMC NAND Flash ATA/ATAPI Controller DVD Dual DVD CD-RW CD-ROM HDD MIC Figure 1-1 Block Diagram of PL-2539 3.0 Overview The PL-2539 is a single-chip multi-featured IC solution that integrates a USB2.0 PHY, turbo 8051 microprocessor, USB1.1 Lite Host, MP3 decoder, ADPCM voice recorder, card reader controller, NAND Flash controller, and ATA/ATAPI controller. It is the first all-in-one chip solution for MP3 player, digital voice recorder, audio/image data bank, and portable USB 2.0 storage drive makers. Through the Hi-Speed USB 2.0 connection, users can easily download MP3 files from the PC to the built-in PL-2539 MP3 solution device. With Prolifics proprietary USB1.1 Lite Host, users can also plug in another USB Flash disk for extra storage or also connect to any digital still camera (DSC) to download images directly. In addition to the storage device, the USB Lite Host can also support other type of devices like USB printer, PDA, and others. The PL-2539 also provides high-speed transmission to various memory card interfaces such as Memory Stick(MS)/Memory Stick PRO(MS PRO), Secure Digital (SD), Multi Media Card (MMC), CompactFlash (CF), MicroDrive (MD), SmartMedia (SM), xD-Picture Card (xD) and so on. Users can easily copy the files stored in these memory cards to the PL-2539 multimedia bank solution. Moreover, the PL-2539 provides an LCD interface and lots of GPIO pins to provide a user-friendly interface solution. PL-2539 Product Datasheet - 7 - Document Version 0.9A Release Date: October 2004 ds_pl2539_v09A Full Plug-and-Play support is implemented according to the standard USB mass storage class driver. Since the driver is already built inside the OS like Linux, Mac OS, and Windows, theres no need to install any separate driver. 4.0 Pin Assignment and Description PL-2539 SRAM_DIO9 XCLK_8X256K SRAM_DIO10 PORT13 SRAM_DIO11 XSC32KI VCC2K NC NC NC XSCI XSCO AVCC3 AGND RREF V2_5 KD8 KD9 KD10 VCCKP KD11 KD12 KD13 KD14 KD15 PORT24 IDE_DIORJ PORT25 IDE_IORDY ADC_XVRB ADC_XVRT ADC_XAIN VCCA_ADC GNDA_ADC PORT26 PORT16 PORT15 PORT30 SRAM_DIO8 XADC_SD 163 164 165 166 167 212 213 214 215 216 108 107 106 105 104 59 58 57 56 55 162 161 160 159 158113 112 111 110 109 123455051525354 Figure 4-1 Pin Assignment of PL-2539 LQFP216 PL-2539 Product Datasheet - 8 - Document Version 0.9A Release Date: October 2004 ds_pl2539_v09A Table 4-1 Pin Descriptions of PL-2539 LQFP216 I/O Attribute Index: I: Input O: Output B: Bi-directional P: Power/Ground Pin Symbol Type Description 1 XSCI I Crystal input. The input frequency is 12M. 2 XSCO O Crystal output 3 AVCC3 P Analog 3.3V power 4 AGND P Analog ground 5 RREF I Connect external reference resistor (12.1Kohm ± 1%) to Analog GND 6 DM B USB2.0 D- pin 7 DP B USB2.0 D+ pin 8 AVCC3 P Analog 3.3V power 9 AGND P Analog ground 10 IDE_DA0/GQ06 O Bit 0 of IDE address bus 11 USBVCC I USB power input. Use to detect the presence of external USB host. 12 SRAM_ADDR12 O Bit 12 of external Data SRAM/SDRAM address bus 13 XRAM_CSB O Chip select of external SRAM on CPU bus, active low. 14 IDE_DA1/GQ07 O Bit 1 of IDE address bus 15 X_RAM_OEB O Output enable of external SRAM on CPU bus, active low. 16 SRAM_ADDR13 O Bit 13 of external Data SRAM address bus/ Bit 0 of external Data SDRAM Bank Address 17 G13 B General purpose input/output (GPIO) 18 SRAM_ADDR14 O Bit 14 of external Data SRAM address bus/ Bit 1 of external Data SDRAM Bank Address 19 MS_BS O MS/MS Pro bus state signal 20 XRAM_WEB O Write enable of external SRAM on CPU bus, active low. 21 SRAM_ADDR15 O Bit 15 of external Data SRAM address bus/ Clock enable for external Data SDRAM 22 MS_SDIO3 B Bit 3 of MS Pro data signal 23 G14 B GPIO 24 SRAM_ADDR16 O Bit 16 of external Data SRAM address bus/ Clock of external Data SDRAM 25 G15 B GPIO 26 MS_DOIO2 B Bit 2 of MS Pro data signal 27 PORT12 B Bit 2 of 8032 PORT1 28 VCC25 P 2.5V power 29 MS_SDIO1 B Bit 1 of MS Pro data signal 30 PORT11 B Bit 1 of 8032 PORT1 PL-2539 Product Datasheet - 9 - Document Version 0.9A Release Date: October 2004 ds_pl2539_v09A Pin Symbol Type Description 31 MS_SDIO0 B Bit 0 of MS/MS Pro data signal 32 PORT10 B Bit 0 of 8032 PORT1 33 MS_SCK O Clock of MS/MS Pro 34 KD0 B Bit 0 of DMA data bus 35 VCC3 P 3.3V power 36 KD1 B Bit 1 of DMA data bus 37 KD2 B Bit 2 of DMA data bus 38 GP00 B GPIO 39 KD3 B Bit 3 of DMA data bus 40 KD4 B Bit 4 of DMA data bus 41 IDE_DA2/GQ17 O Bit 2 of IDE address bus 42 KD5 B Bit 5 of DMA data bus 43 GP01 B GPIO 44 KD6 B Bit 6 of DMA data bus 45 GP02 B GPIO 46 KD7 B Bit 7 of DMA data bus 47 GP03 B GPIO 48 GND P Regulator GND 49 VCC3I P 3.3V power input of Regulator 50 VCCO P 2.5V power output of Regulator 51 KD8 B Bit 8 of DMA data bus 52 KD9 B Bit 9 of DMA data bus 53 KD10 B Bit 10 of DMA data bus 54 VCC25 P 2.5V Power 55 KD11 B Bit 11 of DMA data bus 56 KD12 B Bit 12 of DMA data bus 57 KD13 B Bit 13 of DMA data bus 58 KD14 B Bit 14 of DMA data bus 59 KD15 B Bit 15 of DMA data bus 60 SM_RDJ/GQ00 O NAND flash read signal, active low. 61 GP11 B GPIO 62 G16 B GPIO 63 GP10 B GPIO 64 SM_WEJ/GQ01 O NAND flash write signal, active low. 65 SRAM_ADDR7 O Bit 7 of external Data SRAM/SDRAM address bus PL-2539 Product Datasheet - 10 - Document Version 0.9A Release Date: October 2004 ds_pl2539_v09A Pin Symbol Type Description 66 SM_CLE/GQ02 O Command latch enable of NAND flash 67 IDE_INTRQ/GQ15 I INTRQ signal of IDE 68 X_ROM_CSB O Chip select of ICP flash ROM, active low. 69 SRAM_ADDR6 O Bit 6 of external Data SRAM/SDRAM address bus 70 X_ROM_OEB O Output enable of ICP flash ROM, active low. 71 GND P Digital ground 72 X_ROM_WEB O Write enable of ICP flash ROM, active low. 73 IDE_DMARQ/GQ16 I DMARQ signal of IDE 74 SRAM_ADDR5 O Bit 5 of external Data SRAM/SDRAM address bus 75 PORT07 B Bit 7 of 8032 PORT0 76 GP07 B GPIO 77 SRAM_ADDR4 O Bit 4 of external Data SRAM/SDRAM address bus 78 VCC3 P 3.3V power 79 PORT06 B Bit 6 of 8032 PORT0 80 SRAM_OEJ O Output enable of external Data SRAM, active low/ Chip select of external Data SDRAM, active low. 81 SRAM_WEJ O Write enable of external Data SRAM/SDRAM, active low. 82 PORT05 B Bit 5 of 8032 PORT0 83 SRAM_CS1 O Chip select 1 of external Data SRAM/ Row address strobe (RAS) of external Data SDRAM 84 SRAM_CS0J O Chip select 0 of external Data SRAM, active low/ Chip select of external Data SDRAM, active low. 85 PORT04 B Bit 4 of 8032 PORT0 86 SRAM_ADDR3 O Bit 3 of external Data SRAM/SDRAM address bus 87 IDE_RESETJ/GQ10 O Reset signal of IDE, active low. 88 PORT03 B Bit 3 of 8032 PORT0 89 SRAM_ADDR2 O Bit 2 of external Data SRAM/SDRAM address bus 90 IDE_DMACKJ/GQ13 O DMACKJ signal of IDE, active low. 91 PORT02 B Bit 2 of 8032 PORT0 92 SRAM_ADDR1 O Bit 1 of external Data SRAM/SDRAM address bus 93 GP06 B GPIO 94 PORT01 B Bit 1 of 8032 PORT0 95 GP17 B GPIO 96 SRAM_ADDR0 O Bit 0 of external Data SRAM/SDRAM address bus 97 PORT00 B Bit 0 of 8032 PORT0 98 PORT21 B Bit 1 of 8032 PORT2 99 GP04 B GPIO 100 PORT22 B Bit 2 of 8032 PORT2 PL-2539 Product Datasheet - 11 - Document Version 0.9A Release Date: October 2004 ds_pl2539_v09A Pin Symbol Type Description 101 MS_INS I MS/MS Pro insertion/extraction detect-terminal 102 PORT20 B Bit 0 of 8032 PORT2 103 PORT23 B Bit 3 of 8032 PORT2 104 PORT24 B Bit 4 of 8032 PORT2 105 IDE_DIORJ/GQ12 O IO read signal of IDE, active low. 106 PORT25 B Bit 5 of 8032 PORT2 107 IDE_IORDY/GQ14 I IO ready signal of IDE 108 ADC_XVRB I Bottom reference voltage of internal ADC 109 ADC_XVRT I Top reference voltage of internal ADC 110 ADC_XAIN I Analog input of internal ADC 111 VCCA_ADC P 3.3V power of internal ADC 112 GNDA_ADC P Analog ground of internal ADC 113 PORT26 B Bit 6 of 8032 PORT2 114 IDE_IOWJ/GQ11 O IO write signal of IDE, active low. 115 X_ROM_D0 B Bit 0 of ICP flash ROM/SRAM on CPU bus /LCD panel data bus 116 X_ROM_D1 B Bit 1 of ICP flash ROM/SRAM on CPU bus /LCD panel data bus 117 GND P Digital ground 118 SRAM_DIO0 B Bit 0 of external Data SRAM/SDRAM data bus 119 X_ROM_D2 B Bit 2 of ICP flash ROM/SRAM on CPU bus /LCD panel data bus 120 SRAM_DIO1 B Bit 1 of external Data SRAM/SDRAM data bus 121 X_ROM_D3 B Bit 3 of ICP flash ROM/SRAM on CPU bus /LCD panel data bus 122 X_ROM_D4 B Bit 4 of ICP flash ROM/SRAM on CPU bus /LCD panel data bus 123 SRAM_DIO2 B Bit 2 of external Data SRAM/SDRAM data bus 124 X_ROM_D5 B Bit 5 of ICP flash ROM/SRAM on CPU bus /LCD panel data bus 125 SRAM_DIO3 B Bit 3 of external Data SRAM/SDRAM data bus 126 X_ROM_D6 B Bit 6 of ICP flash ROM/SRAM on CPU bus /LCD panel data bus 127 GND P Digital ground 128 SRAM_DIO4 B Bit 4 of external Data SRAM/SDRAM data bus 129 X_ROM_D7 B Bit 7 of ICP flash ROM/SRAM on CPU bus /LCD panel data bus 130 SRAM_DIO5 B Bit 5 of external Data SRAM/SDRAM data bus PL-2539 Product Datasheet - 12 - Document Version 0.9A Release Date: October 2004 ds_pl2539_v09A Pin Symbol Type Description 131 X_LCD_CSB B Chip select of LCD panel, active low. 132 SRAM_DIO6 B Bit 6 of external Data SRAM/SDRAM data bus 133 X_LCD_OEB O Output enable of LCD panel, active low. 134 SRAM_DIO7 B Bit 7 of external Data SRAM/SDRAM data bus 135 VCC25 P 2.5V Power 136 X_LCD_WEB O Write enable of LCD panel, active low. 137 SRAM_LBEJ O Low byte enable of external Data SRAM, active low./ Bit 0 of data IO Mask of external Data SDRAM 138 G12 B GPIO 139 SRAM_HBEJ O High byte enable of external Data SRAM, active low./ Bit 1 of data IO Mask of external Data SDRAM 140 SM_ALE/GQ03 O Address latch enable of NAND Flash 141 G00 B GPIO 142 GP16 B GPIO 143 RESETJ I Reset input, active low. 144 GP14 B GPIO 145 GP13 B GPIO 146 GP15 B GPIO 147 VCC3 P 3.3V power 148 TEST I Chip test mode enable 149 XDAC_SD O Data signal for external DAC 150 GP12 B GPIO 151 VCC25 P 2.5V power 152 XDAC_SCK O Clock signal for external DAC 153 XDAC_WS O Word select signal for external DAC 154 G11 B GPIO 155 GP05 B GPIO 156 G17 B GPIO 157 G10 B GPIO 158 PORT16 B Bit 6 of 8032 PORT1 159 PORT15 B Bit 5 of 8032 PORT1 160 PORT30 B Bit 0 of 8032 PORT3 161 SRAM_DIO8 B Bit 8 of external Data SRAM/SDRAM data bus 162 XADC_SD I Data signal for external ADC 163 SRAM_DIO9 B Bit 9 of external Data SRAM/SDRAM data bus 164 XCLK_8X256K O 256 times sampling clock output for external ADC/DAC 165 SRAM_DIO10 B Bit 10 of external Data SRAM/SDRAM data bus PL-2539 Product Datasheet - 13 - Document Version 0.9A Release Date: October 2004 ds_pl2539_v09A Pin Symbol Type Description 166 PORT13 B Bit 3 of 8032 PORT1 167 SRAM_DIO11 B Bit 11 of external Data SRAM/SDRAM data bus 168 XADC_WS O Word select signal for external ADC 169 PORT35 B Bit 5 of 8032 PORT3 170 G01 B GPIO