先进芯片封装知识介绍.pptx
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1、AdvancedPackagingTechAdvancedPackagingTechOutlinePackageDevelopmentTrend3DPackageWLCSP&FlipChipPackagePackageDevelopmentTrendSOFamilyQFPFamilyBGAFamilyPackageDevelopmentTrendCSPFamilyMemoryCardSiPModulePackageDevelopmentTrend3DPackage3DPackage3DPackageIntroductionetCSPStackFunctionalIntegrationHighL
2、owTape-SCSP(orLGA)S-CSP(orLGA)S-PBGAS-M2CSPStacked-SiP2ChipStackWirebond2ChipStackFlipChip&WirebondMultiChipStackPackageonPackage(PoP)StackingSS-SCSP(film)FS-BGA3S-PBGAS-SBGAS-TSOP/S-QFP 3S-CSPS-etCSPetCSP+S-CSP PS-fcCSP+SCSP PoPwithinterposerFS-CSP2FS-CSP1PaperThinPS-vfBGA+SCSPPiP 5SCSPSS-SCSP(past
3、e)UltrathinStackD2D3D4D2D2D3D4D2 PoPQFN4SS-SCSPStackedDieTopdieBottomdieFOWmaterilWireTSVTSV(ThroughSiliconVia)Athrough-siliconvia(TSV)isaverticalelectricalconnection(via)passingcompletelythroughasiliconwaferordie.TSVtechnologyisimportantincreating3Dpackagesand3Dintegratedcircuits.A3Dpackage(Systemi
4、nPackage,ChipStackMCM,etc.)containstwoormorechips(integratedcircuits)stackedverticallysothattheyoccupylessspace.Inmost3Dpackages,thestackedchipsarewiredtogetheralongtheiredges.Thisedgewiringslightlyincreasesthelengthandwidthofthepackageandusuallyrequiresanextra“interposer”layerbetweenthechips.Insome
5、new3Dpackages,through-siliconviareplaceedgewiringbycreatingverticalconnectionsthroughthebodyofthechips.Theresultingpackagehasnoaddedlengthorthickness.WireBondingStackedDieTSVWhatsPoP?PoPisPackageonPackageTopandbottompackagesaretestedseparatelybydevicemanufacturerorsubcon.PoPPoPPS-vfBGAPS-etCSPLowLoo
6、pWirePinGateMoldPackageStackingWaferThinningPoPCoreTechnologyPoPAllowsforwarpagereductionbyutilizingfully-moldedstructureMorecompatiblewithsubstratethicknessreductionProvidesfinepitchtoppackageinterfacewiththrumoldviaImprovedboardlevelreliabilityLargerdiesize/packagesizeratioCompatiblewithflipchip,w
7、irebond,orstackeddieconfigurationsCosteffectivecomparedtoalternativenextgenerationsolutionsAmkorsTMVPoPTop viewBottom viewThrough Mold ViaPoPBallPlacementontopsurfaceBallPlacementonbottomDieBondMold(UnderFulloptional)LaserdrillingSingulationFinalVisualInspectionBaseMtlThermaleffectProcessFlowofTMVPo
8、PDigital(Btmdie)+Analog(Middledie)+Memory(Toppkg)PotableDigitalGadgetCellularPhone,DigitalStillCamera,PotableGameUnitMemorydieAnalogdieDigitaldiespacerEpoxyPiPEasysystemintegrationFlexiblememoryconfiguration100%memoryKGDThinnerpackagethanPOPHighIOinterconnectionthanPOPSmallfootprintinCSPformatIthass
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